The present invention relates to delta-sigma analog-to-digital converters.
The simplest circuit of a delta-sigma analog-to-digital converter comparable with the subject matter of the invention according to claim 1 is described in the journal "rme", 1978, page 024.
That basic circuit consists of: an integrator, namely a simple RC section; a comparator whose comparator input is supplied with an analog signal to be converted, and whose reference input is connected to the junction of the resistor and capacitor of the integrator; a D flip-flop having its D input connected to the output of the comparator, and whose clock input is supplied with a clock signal; a series combination of a first and a second electronic switch connected between the reference voltage and ground wherein the control inputs of the first and second electronic switches are connected to the non-inverted and inverted outputs, respectively, of the D flip-flop, and wherein the junction of the electronic switches is coupled to the signal input of the integrator through the resistor of the RC section; and a further-processing arrangement having its input connected to the noninverted output of the D flip-flop.
The simplest circuit of a delta-sigma analog-to-digital converter comparable with the subject matter of the invention according to claim 2 is described in U.S. Pat No. -A-3,955,191.
According to FIG. 5 of U.S. Pat. No. -A-3,955,191, this basic circuit comprises an RC section as an integrator to which an analog signal to be converted is applied through the integrating resistor, and a D flip-flop whose D input is connected to the junction of the resistor and capacitor of the integrator, and whose clock input is supplied with a clock signal, and whose inverted output is fed back to said junction through an additional resistor, which junction is also connected to a reference voltage.
If, as shown in FIG. 7 of U.S. Pat No. -A-3,955,191, an operational amplifier is inserted between the analog-signal input and the integrator such that its first input is supplied with the analog signal and its second input is grounded, the inverted output of the D flip-flop may be additionally fed back to that first input through a T-section consisting of two resistors and a capacitor.
An essential feature of the simple delta-sigma analog-to-digital converter described in the above journal "rme" is that the number of polarity reversals occurring at the output of the comparator per unit of time, i.e., their frequency, depends on the amplitude of the analog signal to be converted: This frequency is exactly one-half that of the clock signal if the amplitude of the analog signal is equal to one-half of the reference voltage, and decreases from this value toward both smaller and larger amplitudes proportionally to the amplitude, of the explanation of FIG. 5 below.
Particularly with high-frequency clock signals, the switching times of the electronic switches or of the output transistors of the D flip-flop, which are variable due to the variable frequency of the polarity reversals, cause considerable linearity errors, so that the attainable accuracy of the conventional delta-sigma analog-to-digital converter is quite limited. In addition, these switching times are strongly temperature-dependent, which contributes to the linearity error but is practically noncompensable.
The invention serves to solve this problem.